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ove's avatar
ove
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1 day ago

Agilex5 Eagle ES, NIOS-V + TSE IP

Trying to setup a NIOS-V with a TSE MAC to utilize the ethernet interface connected to the FPGA on the Agilex Eagle ES devkit.

NIOS executes firmware and able to read the PHY registers. But when connecting the ethernet cable nothing seems to happen, status registers does not change and no link-up is reported. 

Does anyone know of any examples using the NIOS-V and TSE with RGMII interface that I can look at to troubleshoot the issue ?

Fpga Devkit
soc devkit

1 Reply

  • SteveK_Arrow's avatar
    SteveK_Arrow
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    2 hours ago

    Hi ove

    There are no examples available on the Eagle board at present. However, I did find this example for the Altera development kit that could be ported. It uses FreeRTOS to manage the Ethernet stack and TSE IP with an RGMII interface to a Marvel phy.

    https://github.com/altera-fpga/agilex5e-nios-ed/blob/rel/25.3.1/niosv_g/niosv_g_webserver_ping/docs/Nios_Vg_Processor_Webserver_Ping_Design_on_Agilex_5_FPGA.md

    Regards

    Steven