Forum Discussion
ove
New Contributor
5 months agoAgilex5 Eagle ES, NIOS-V + TSE IP
Trying to setup a NIOS-V with a TSE MAC to utilize the ethernet interface connected to the FPGA on the Agilex Eagle ES devkit. NIOS executes firmware and able to read the PHY registers. But when con...
Naji_Naufel_Arrow
Occasional Contributor
4 months agoHi ove,
Are you running an RTSO, or OS with a TCP/IP stack to communicate with the TSE?
If not, How are you trying to access the TSE from the NIOS?
Thank you
ove
New Contributor
4 months agoUsing the functions included in the BSP (#include "intel_eth_tse_regs.h") right now just for testing
- tehjingy_Altera4 months ago
Regular Contributor
Hi ove
You could take a look at the ED NiosV +TSE IP in the link below:
https://altera-fpga.github.io/rel-25.3/embedded-designs/agilex-5/e-series/premium/niosv/niosv_g/webserver_ping/ug-webserver-ping-agx5e-premium/#nios-vg-ping-application-litert-design-architecture