Logic elements utilization in FPGA
Hello All,
I have an old design on cyclone 3 with Quartus 10 and the used logic elements (in ALMs) are 20k.
Now, I migrate exactly the same design to Quartus 21 also I changed the FPGA to Cyclone V and now the used logic elements (in ALMs) are 4k.
So the only changes are the FPGA from Cyclone 3 to V and the Quartus version from 10 to 21.
Why the used logic elements (in ALMs) reduced from 20k to 4k?
What could wrong happend? w
PS. no optimization is done for both Quartus project.
Hi Taha,
Yes, with a large software jump I would expect differences in the project. Be it ALM usage or place & route or timing performance.
This is because as the Quartus versions change the optimization algorithm also changes.
I would suggest to also check for nodes that have been synthesized away. If your design is small enough, you can see it in the netlist viewers. It is easier to check in the warning messages too. Check for the below warning message
"Warning (14320): Synthesized away node"
Regards,
Nurina