Forum Discussion
New ContributorLogic elements utilization in FPGA
Hi Taha,
Yes, with a large software jump I would expect differences in the project. Be it ALM usage or place & route or timing performance.
This is because as the Quartus versions change the optimization algorithm also changes.
I would suggest to also check for nodes that have been synthesized away. If your design is small enough, you can see it in the netlist viewers. It is easier to check in the warning messages too. Check for the below warning message
"Warning (14320): Synthesized away node"
Regards,
Nurina
Regular ContributorHi Taha,
Yes, with a large software jump I would expect differences in the project. Be it ALM usage or place & route or timing performance.
This is because as the Quartus versions change the optimization algorithm also changes.
I would suggest to also check for nodes that have been synthesized away. If your design is small enough, you can see it in the netlist viewers. It is easier to check in the warning messages too. Check for the below warning message
"Warning (14320): Synthesized away node"
Regards,
Nurina
New ContributorHello @Nurina ,
I got this after all the compilation complete(no error, or critical warning), I believe the design is good, but I want to double-check with you for the last time.
Do You think it is fine?
Thank you so much for your support.
FvMSuper Contributor
Hi,
the basic point wasn't yet mentioned. Cyclone III (respectively IV or 10) LE is a completely different metric than Cyclone V ALM. Cyclone III LE has one 4-input LUT, ALM has two 6-input LUTs. Effectivity of 4- versus 6-input LUTs is different depending on the complexity of logic or arithmetic operations. Therefore it's difficult to define a general factor.
