Forum Discussion
Occasional ContributorAI Suite - How to interpret these graphs in Model Analyzer GUI
Hello Altera Community
What can I learn from these subgraphs? I'm not sure how to connect it to the dla layer device file. The compiler told me: [ INFO ] The input graph is split into 9 subgraph(s), FPGA:3 CPU:6.
(unsupported_layer_chains.dot)
There are 9 nodes with "Transpose does not precede an FC layer." and 2 nodes with "Interpolation input not in NCDHW layout"
(hetero_subgraphs_TensorFlow_Frontend_IR_3.dot)
Why is there a node for device subgraph?
Thanks in advance.
Thank you for sharing the compiler reports. Below is how to read them, and why DeviceSubgraph appears.
What you can learn from these subgraphsThe compiler message:
The input graph is split into 9 subgraph(s), FPGA:3 CPU:6
means the model does not run as one FPGA graph. OpenVINO HETERO splits it into contiguous islands: 3 on FPGA and 6 on CPU. Each island is a subgraph. Data that crosses FPGA ↔ CPU is copied through host memory, so extra islands usually mean extra latency.
From your YOLO3 TensorFlow graph, the 9 partitions are:
FPGA (3) — real DLA compute
- DeviceSubgraph_8061 (subgraph=15): backbone + conv2d_58 head
- DeviceSubgraph_8068 (subgraph=20): medium-scale path + conv2d_66 head
- DeviceSubgraph_8073 (subgraph=26): fine-scale path + conv2d_74 head
CPU (6) — layout / upsample / outputs
- Input NHWC→NCHW (Transpose_169) and the stem that stays with it
- Two FPN upsample islands (up_sampling2d and up_sampling2d_1)
- Three output NCHW→NHWC transposes (conv2d_58/66/74 BiasAdd → Result)
Why is there a node named DeviceSubgraph?
DeviceSubgraph_8061 / _8068 / _8073 are not layers from your Keras/TF model.
The HETERO plugin groups a run of consecutive FPGA layers into one hetero::DeviceSubgraph node so the top-level (_3) graph can show:
- CPU ops in full
- Each FPGA island as one “execute this blob on FPGA AI Suite IP” node
That is why you see exactly three DeviceSubgraph boxes — they are the FPGA:3 count.
To see the convolutions inside one box, open the matching file, for example:
hetero_subgraphs_TensorFlow_Frontend_IR_3_node_DeviceSubgraph_8061_subgraph_#0.dot
3 Replies
JohnT_AlteraRegular Contributor
Hi,
Can you share the subgraph file and dot file? I am not able zoom in the picture to understand on the issue observed by you.- Mads_From_Denmark
Yes, the forum won't accept them so I uploaded them to Git
also what is the purpose with the dot files in the visualization folder, They don't seem to be viewable with the model analyzer GUI
madskost/yolo3_fpga_ai_suite_compiled_output
- JohnT_Altera
Thank you for sharing the compiler reports. Below is how to read them, and why DeviceSubgraph appears.
What you can learn from these subgraphsThe compiler message:
The input graph is split into 9 subgraph(s), FPGA:3 CPU:6
means the model does not run as one FPGA graph. OpenVINO HETERO splits it into contiguous islands: 3 on FPGA and 6 on CPU. Each island is a subgraph. Data that crosses FPGA ↔ CPU is copied through host memory, so extra islands usually mean extra latency.
From your YOLO3 TensorFlow graph, the 9 partitions are:
FPGA (3) — real DLA compute
- DeviceSubgraph_8061 (subgraph=15): backbone + conv2d_58 head
- DeviceSubgraph_8068 (subgraph=20): medium-scale path + conv2d_66 head
- DeviceSubgraph_8073 (subgraph=26): fine-scale path + conv2d_74 head
CPU (6) — layout / upsample / outputs
- Input NHWC→NCHW (Transpose_169) and the stem that stays with it
- Two FPN upsample islands (up_sampling2d and up_sampling2d_1)
- Three output NCHW→NHWC transposes (conv2d_58/66/74 BiasAdd → Result)
Why is there a node named DeviceSubgraph?
DeviceSubgraph_8061 / _8068 / _8073 are not layers from your Keras/TF model.
The HETERO plugin groups a run of consecutive FPGA layers into one hetero::DeviceSubgraph node so the top-level (_3) graph can show:
- CPU ops in full
- Each FPGA island as one “execute this blob on FPGA AI Suite IP” node
That is why you see exactly three DeviceSubgraph boxes — they are the FPGA:3 count.
To see the convolutions inside one box, open the matching file, for example:
hetero_subgraphs_TensorFlow_Frontend_IR_3_node_DeviceSubgraph_8061_subgraph_#0.dot
