AI Suite - Custom model in the FPGA building process

Hello Altera Community. 

My question is: Where in the FPGA building process do I incorporate my costum neural network into the design?

This is my current understanding of the FPGA building process:

1. The IP block is generated with the dla create ip script, which takes arch file as input.
2. The IP block is placed in platform designer, and then is connected to memory and signals.
3. After compiling, the data is send to the design using runtime, (JTAG being the slowest)

Where does the NN Model I made with PyTorch gets incorporated into all this?