Occasional ContributorI am connecting to a university high performance computer through Putty. The computer has Quartus 19.1 installed. After opening my project in Quartus, I launch the design space explorer. I set it up the same way I do on my local machine but when I try to run it I get the following errors:
What is causing this and how do I solve it?
Super ContributorCan help to answer the below?
1) Are you using Quartus standard edition of Pro edition?
2) Does the full compilation pass in a standalone design?
3) Can you attached your design.qar files to look into it? It might be a bugs.
Occasional Contributor1)Standard
2)If you mean a standard compilation in Quartus, I just tried, it doesn't work. It also generates the "cpu: failed to generate module..." error
3) I'm not sure what .qar files do and am not familiar with them. I have not generated one myself but I am attaching the .quar file that I found in the dse folder
Occasional ContributorIt might also be relevant to add that the project was initially created in Quartus 18.1. Also, after I open the project in Quartus 19.1 on the university computer and fail to compile there, when I reopen it again in Quartus 18.1 on my local machine and run DSE II, DSE II stays stuck setting up the compilation forever. The only way I found to fix this is restoring my project from a backup made efore I opened it in Qaurtus 19.1
Occasional ContributorThat means it probably has nothing to do with DSE. To confirm this, make sure it compiles successfully in any Quartus version, and relaunch DSE of the same version.
Occasional ContributorYes, it seems unrelated to DSE. I can compile the project in Quartus 18.1 and its DSE on my local machine. A colleague of mine is able to compile his projects on the university computer, but he created his project in Quartus 19.1 directly in the University computer whereas I created my project on my local computer in 18.1(actually in 17.1 and then moved it to 18.1).
Super ContributorI just compile your design in normal compilation and DSE compilation in Q19.3
Both was without any error. This might be your individual computer issue?
Occasional ContributorLike I mentioned before, a colleague of mine is using the computer and compiling without problems. After experimentation I now suspect that the stratix V hard IP for PCIE is causing the issue. The error message does not appear if that module is not included in the project.
Super ContributorCan you put in stratix V hard IP for PCIE to your Pipelined_Smith-Waterman.qar files? I will test it here for you.
Super ContributorAny update?
