Why is the simulation result of the "demo_cfr" in the DSP Builder for FPGAs incorrect?
Description Due to a problem with the DSP Builder for FPGAs in the Quartus® Prime Pro Edition Software v20.4, the .mdl simulink file only works for one specific device/speedgrade/clock target combination. The simulation results will be wrong with other combinations. Resolution To workaround this problem, replace the old .mdl simulink file in demo_cfr with the new demo_cfr.mdl file.Why does the GTS AXI Streaming IP for PCI Express* design example for Agilex™ 5 FPGAs fail to operate and enumerate in hardware when loaded from QSPI on the Agilex™ 5 FPGA E-Series 065B Modular Development Kit (MK-A5E065BB32AES1)?
Description Due to a problem in the MAX® 10 FPGAs' power sequence, the SYSPLL input clock is not stable before the configuration process of the Agilex™ 5 FPGAs. You may observe that the Agilex™ 5 FPGA GTS PCIe AXI Streaming design example fails to operate and enumerate in hardware when loaded from QSPI on the Agilex™ 5 FPGA E-Series 065B Modular Development Kit (MK-A5E065BB32AES1). Resolution You may download the updated POF file for MAX® 10 FPGAs (max10-output-file-1-b.pof), follow the steps below to program the MAX® 10 FPGAs POF file with a USB Micro cable: Set Switch S13-3 to "OFF" and plug in the USB Micro cable between the Dev Kit and the PC. Power on the Dev Kit. Open the Command Prompt in Windows, and run below commands: jtagconfig --setparam 1 JtagClock 16M jtagconfig --setparam 1 JtagClockAutoAdjust 0 jtagconfig --setparam 1 InternalMaxSelect 1 Open the Quartus® Programmer GUI and program the MAX® 10 FPGAs POF file. Power cycle the Dev Kit.Why do I get a fatal error when creating an ALTPLL IP?
Description Due to a problem in the Quartus® Standard Edition Software version 23.1, you might see a fatal error when creating an ALTPLL IP Using the MegaWizard Plug-In Manager. Resolution To work around this problem, download and install the patches below for the Quartus® Prime Standard Edition Software version 23.1 Quartus® Prime Standard Edition Software v23.1 Patch 0.02std for Windows (.exe) Quartus® Prime Standard Edition Software v23.1 Patch 0.02std for Linux (.run) Readme for Quartus® Prime Standard Edition Software v23.1 Patch 0.02std (.txt) This problem is scheduled to be fixed in a future release of the Quartus® Prime Standard Edition Software.Why do I see errors like wsl dos2unix create-this-app;./create-this-app --no-make or make: command not found when running Nios® II Software Build Tools for Eclipse on Windows?
Description These problems might be seen in the Quartus® Prime Standard Edition Software version 21.1 when using the Nios® II Software Build Tools for Eclipse in Windows operating system (OS) to build the Nios II processor software. This is due to incorrect WSLENV variables set due to a problem in the Eclipse executables. The following errors might be seen when building the Nios II processor software using Windows Subsystem for Linux (WSL): wsl dos2unix create-this-app;./create-this-app --no-make This error may be prompted when launching the Nios® II Software Build Tools for Eclipse from Windows menu. make: command not found This error may be prompted when launching the Nios® II Software Build Tools for Eclipse from the Nios® II Command Shell. Resolution To work around this problem, download and install the patch for the Quartus® Prime Standard Edition Software v21.1. Download and install Patch for version 21.1 from the appropriate link below. Download the version 21.1 Update for Windows (.exe) Download the Readme for the Quartus® Prime Standard Edition software version 21.1 Update (.txt)Why does the Nios® V/g processor return inaccurate floating-point calculation results when the Floating-Point Unit is enabled?
Description Due to a problem in the Quartus® Prime Standard Edition Software version 24.1, the Nios® V/g processor might return inaccurate floating-point calculation results when the Floating-Point Unit (FPU) is enabled. This problem is found in Max® 10 FPGA devices only. Other Altera® FPGA devices are not affected. This is because there is a problem in the FPU module, which generates spurious signals affecting the calculation results. Resolution A patch is available to fix this problem for the Quartus® Prime Standard Edition Software version 24.1. Download and install patch 0.03 from the following links: Quartus® Prime Standard Edition Software v24.1 Patch 0.03 This problem is scheduled to be fixed in a future release of the Quartus® Prime Standard Edition Software.Are there any functional or security updates for the Quartus® Prime Standard Edition Software version 23.1.1?
Description The Quartus® Prime Standard Edition Software version 23.1.1 Patch 1.01std includes functional and security updates. Users should keep their software up-to-date and follow the technical recommendations to help improve security. If you need additional security updates, they will be provided in this article as they become available. Resolution A patch is available to include this update for the Quartus® Prime Standard Edition Software version 23.1.1 and the Quartus® Prime Lite Edition Software Version 23.1.1. Download and install Patch 1.01std below. This problem is scheduled to be fixed in a future release of the Quartus® Prime Standard Edition Software and the Quartus® Prime Lite Edition Software.Quartus® Prime Pro Edition User Guide - Map file description not full in Table 3. Programming File Generator Output File Types
Description The description for the Map file is in Table 3. Programming File Generator Output File Types of the Quartus® Prime Pro Edition User Guide: Programmer is not full. User Guide: Quartus® Prime Pro Edition User Guide: Programmer ID: 683039 Version: 4/03/2023 Section: 2.2.1.2. Secondary Programming Files (Programming File Generator) Table: Programming File Generator Output File Types 2.2.1.2. Secondary Programming Files (Programming File Generator) Resolution Not full description is: A text file containing the byte addresses of pages and data stored in the memory of a configuration device for Full description should like below: A text file containing the byte addresses of pages and HEX data stored in the memory of an EPC4, EPC8, or EPC16 configuration device. The file stores the start and end addresses of the Main Block Data and Bottom Boot Data items, and the start and end addresses of pages within the Main Block Data item. This updated information will be added in the Intel® Quartus® Prime Pro Edition User Guide: Programmer, version 24.1.Why are the peripherals under 2GB Peripheral Region still cached by the Nios® V/g processor?
Description Due to a problem in the: Quartus® Prime Pro Edition Software version 23.1, 23.2, 23.3, 23.4, 24.1, 24.2, 24.3, 24.3.1, 25.1 Quartus® Prime Standard Edition Software version 23.1, 24.1 The Nios® V/g processor still caches the peripherals if they are placed under a Peripheral Region that is configured to 2GB, regardless of the Base Address. This is due to a problem in the processor RTL failing to correctly implement the 2GB Peripheral Region. Other Peripheral Region sizes are not affected; only 2GB is affected. Resolution To work around this problem, please select other Peripheral Region sizes except 2GB. The Nios® V/g processor still offers Peripheral Region sizes ranging from 64KB to 1GB. The 2GB Size option for Nios® V/g processor Peripheral Region is removed beginning with the Quartus® Prime Pro Edition Software version 25.1.1 and Quartus® Prime Standard Edition Software version 25.1. Related Article NIOS V/g - peripherals under 2GB Peripheral Region | Altera Community - 350829Errors: 'MODULAR_ADC_0_DUAL_ADC_MODE' undeclared here (not in a function)
Description Due to a problem with the Quartus® Prime Standard Edition Software version 21.1, when Modular ADC Core IP used in a Nios® II Gen 2 system, you might see the following errors when building the Nios® II software project: 'MODULAR_ADC_0_DUAL_ADC_MODE' undeclared here (not in a function) 'MODULAR_ADC_0_IRQ_INTERRUPT_CONTROLLER_ID' undeclared here (first use in this function) 'MODULAR_ADC_0_IRQ' undeclared here (first use in this function) 'MODULAR_ADC_0_NAME' undeclared here (not in a function) Resolution To work around this problem, the altera_modular_adc.h file located in \intelFPGA\21.1\ip\altera\altera_modular_adc\top\HAL\inc needs to be replaced with a new one. Download the driver.zip file to obtain the updated altera_modular_adc.h file. This problem is scheduled to be fixed in the Quartus® Prime Standard Edition Software version 22.1 and later versions.
Why does the text overlap in the ALTPLL IP Parameter Editor?
Description Due to a problem in the Quartus® Prime Standard Edition Software version 25.1, you might see that the text overlaps in the ALTPLL IP Parameter Editor on the Windows* Operating System. This prevents the ALTPLL IP from being instantiated. This problem does not occur in the Quartus® Prime Standard Edition Software version 24.1 and earlier. Resolution To work around this problem in the Quartus® Prime Standard Edition Software version 25.1, download and install the patch below: This problem is scheduled to be resolved in a future release of the Quartus® Prime Standard Edition Software.