Why does Ashling* RiscFree* IDE for Altera® FPGAs detect Core 0 only in a Nios® V processor multicore system?

Description

Due to a problem in the Ashling* RiscFree* IDE for Altera software version 25.2.1 (version dated 9^th May 2025), the Ashling* RiscFree* IDE might fail to detect other Nios^® V processor cores (except Core 0) for Nios^® V processor multicore designs. 

This is because there is a bug in the Ashling* GDBServer software. 

Error message: 

[GDB server output] Error: The device configuration selected has only 1 core (Core 0). Core 1 is not available.

Resolution

To workaround this issue, please switch from Ashling* GDBServer to Open On-Chip Debugger (OpenOCD) when debugging a Nios^® V multicore processor system.  

• Add the “–o" argument when running niosv-download. 

niosv-download app.elf -o <options>

This problem is scheduled to be fixed, beginning with the Ashling* RiscFree* IDE for Altera software version 25.3.1 (version dated 1^st August 2025).