Why does the Nios® V processor that applies fast JTAG UART driver stop (stuck in a loop) when the JTAG UART terminal is not active?

Description

Due to a problem in the Board Support Package Editor of Quartus^® Prime software, the JTAG UART driver for fast implementation might get stuck in a loop for any Nios^® V processor designs, when JTAG UART terminal is not active. 

This problem has been present since: 

• Quartus^® Prime Pro Edition software version 21.3 
• Quartus^® Prime Standard Edition software version 22.1 

It is because the JTAG UART IP is initialized before the Nios^® V processor initialization in alt_sys_init.c.

For example:

void alt_sys_init( void ) {  ALTERA_AVALON_JTAG_UART_INIT (JTAG_UART, jtag_uart);  INTEL_NIOSV_M_INIT (NIOS, nios); } 

Resolution

To work around this problem, update the alt_sys_init.c to initialize the Nios^® V processor first. 

void alt_sys_init( void )  {      INTEL_NIOSV_M_INIT (NIOS, nios);      ALTERA_AVALON_JTAG_UART_INIT (JTAG_UART, jtag_uart);   } 

This problem is currently scheduled to be resolved in a future release of the Quartus^® Prime software. 

Additional Information

Refer to Embedded Peripherals IP User Guide [titled as JTAG UART Core - Driver Options: Fast vs. Small Implementations] for more information about the JTAG UART driver for fast (non-blocking) and slow (blocking) implementation. 

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