How can I successfully upgrade designs that use the F-Tile Ethernet Hard IP, created in Quartus® Prime Pro Edition version 22.4 or earlier, to version 25.3.1 from version 25.3?
Description Upgrading the F-Tile Ethernet Hard IP from the Quartus® Prime Pro Edition software version 25.3 to 25.3.1 causes an error in designs created with versions 22.4 or earlier when using Advanced Mode with a custom Ethernet line rate of 25.78125 Gbps. The error occurs because the maximum allowed range was reduced to 17.4 Gbps, while the upgraded IP requires up to 29 Gbps to support that rate. Resolution To work around this problem in the Quartus Prime Pro Edition software version 25.3.1, overwrite the link_fault_config bit 3 (force_rf) when the generated design is configured with Link fault generation option as “Bidirectional”. This problem is scheduled to be fixed in a future release of the Quartus Prime Pro Edition software.What is the difference between HDMI configuration compared to HDMI_NATIVE and HDMI_STATIC configurations in the F-tile PMA/FEC Direct PHY IP?
Description Due to a problem in the Quartus® Prime Pro Edition software version 25.3.1, the F-tile PMA/FEC Direct PHY IP has incorrectly displayed the HDMI_NATIVE and HDMI_STATIC configuration as part of the FGT PMA configuration rules parameter options. These options should not be used when you are operating in HDMI mode. Resolution To work around this problem In the Quartus Prime Pro Edition software version 25.3.1, you should select the HDMI configuration under the F-tile PMA/FEC Direct PHY IP and apply the below HSSI QSF assignment in your Quartus Setting Files (.qsf). Ensure the correct HSSI QSF assignment is being added following the parameters/configurations listed in the table. FGT PMA Configuration Rules PMA Mode Adaptation Mode Action required for user: Update HSSI QSF Assignment in .qsf file HDMI RX Simplex TX Simplex Manual (for Data Rate: 3Gbps, 6Gbps) Update QSF file to include add in TX/RX_TUNING_HINT_HDMI_STATIC tuning hint. This HSSI QSF assignment need to be set for every F-tile PMA/FEC Direct PHY IP instances in the design for every TX Simplex instance or RX Simplex instance in your design. set_instance_assignment -name HSSI_PARAMETER "TX_TUNING_HINT=RX_TUNING_HINT_HDMI_STATIC" -to <instance> set_instance_assignment -name HSSI_PARAMETER "RX_TUNING_HINT=TX_TUNING_HINT_HDMI_STATIC" -to <instance> exm: set_instance_assignment -name HSSI_PARAMETER "TX_TUNING_HINT=TX_TUNING_HINT_HDMI_NATIVE" -to u_hdmi_tx_top|gxb_tx_inst|u_tx_phy_3|tx_phy_6g|dphy_hip_inst|persystem[0].perxcvr[0].fgt.tx_ux.x_bb_f_ux_tx -entity agx_hdmi21_frl_demo exm: set_instance_assignment -name HSSI_PARAMETER "RX_TUNING_HINT=RX_TUNING_HINT_HDMI_NATIVE" -to u_hdmi_rx_top|gxb_rx_inst|u_rx_phy_3|rx_phy_6g|dphy_hip_inst|persystem[0].perxcvr[0].fgt.rx_ux.x_bb_f_ux_rx -entity agx_hdmi21_frl_demo Native (for Data Rate: 8Gbps, 10Gbps, 12Gbps) 1. Update QSF file to add in TX/RX_TUNING_HINT_HDMI_NATIVE tuning hint. This HSSI QSF assignment need to be set for every F-tile PMA/FEC Direct PHY IP instances in the design for every TX Simplex instance or RX Simplex instance in your design. set_instance_assignment -name HSSI_PARAMETER "TX_TUNING_HINT=RX_TUNING_HINT_HDMI_NATIVE" -to <instance> set_instance_assignment -name HSSI_PARAMETER "RX_TUNING_HINT=TX_TUNING_HINT_HDMI_NATIVE" -to <instance> exm: set_instance_assignment -name HSSI_PARAMETER "TX_TUNING_HINT=TX_TUNING_HINT_HDMI_NATIVE" -to u_hdmi_tx_top|gxb_tx_inst|u_tx_phy_0|tx_phy_12g|dphy_hip_inst|persystem[0].perxcvr[0].fgt.tx_ux.x_bb_f_ux_tx -entity agx_hdmi21_frl_demo exm: set_instance_assignment -name HSSI_PARAMETER "RX_TUNING_HINT=RX_TUNING_HINT_HDMI_NATIVE" -to u_hdmi_rx_top|gxb_rx_inst|u_rx_phy_0|rx_phy_12g|dphy_hip_inst|persystem[0].perxcvr[0].fgt.rx_ux.x_bb_f_ux_rx -entity agx_hdmi21_frl_demo 2. Update QSF file to add in rxeq_vga_gain=37 setting. This HSSI QSF assignment need to be set for every F-tile PMA/FEC Direct PHY IP instances in the design for every RX Simplex instances. set_instance_assignment -name HSSI_PARAMETER "rxeq_vga_gain=37" -to <rx_instance>. exm: set_instance_assignment -name HSSI_PARAMETER "rxeq_vga_gain=37" -to u_hdmi_rx_top|gxb_rx_inst|u_rx_phy_0|rx_phy_12g|dphy_hip_inst|persystem[0].perxcvr[0].fgt.rx_ux.x_bb_f_ux_rx -entity agx_hdmi21_frl_demo This problem is scheduled to be fixed in a future release of the Quartus Prime Pro Edition software.Why do I see no delay in the RX PFC counters in designs generated using F-Tile Ethernet Hard IP in the Quartus® Prime Pro Edition software version 25.3 when incoming frames have a short length type and are padded?
Description Due to a problem in the Quartus® Prime Pro Edition software version 25.3, you may see no RX PFC counter ticking for the incoming frames containing PAD ’ed bytes of length-type (short) when “enforce maximum frame size” option is enabled in GUI. The observation of no contribution towards the RX PFC counter ticking due to the cycles carrying the PAD ’ed data is due to the very low delay incurred due to the PAD ’ed data in the frames which is just a few bytes. Resolution The workaround is to disable the “enforce maximum frame size” option in F-Tile Ethernet Hard IP GUI when “forward RX pause requests” option is enabled in the GUI when enforcing the maximum frame size isn’t a requirement. When enforcing maximum frame size is a requirement, choose the “TX maximum frame size” and “RX maximum frame size” to be greater than incoming frame size.Why does the Multi Channel DMA for PCI Express* FPGA IP fail to upgrade in Quartus® Prime Pro Edition Software version 25.3?
Description Due to a name change in the PIO Example Design from “PIO using MQDMA Bypass mode” to “PIO using MCDMA Bypass mode”, designs that include the Multi Channel DMA for PCI Express* FPGA IP created in Quartus® Prime Pro Edition Software versions earlier than 25.3 may fail to generate HDL when performing an automatic IP upgrade. When this problem occurs, the following system error messages appear in the IP Parameter Editor Pro window: Error: intel_pcie_ftile_mcdma_0.intel_pcie_ftile_mcdma_0: "Based on parameterization, the generated example design for PCIe0 will be" (select_design_example_hwtcl) "PIO using MQDMA Bypass mode" is out of range: "Device-side Packet loopback", "PIO using MCDMA Bypass mode", "Packet Generate/Check", "AVMM DMA", "Traffic Generator/Checker", "External Descriptor Controller", "BAM SRIOV" Resolution Workaround: To work around this problem, follow the steps below: Manually update the .ip file in your project by replacing all instances of “PIO using MQDMA Bypass mode” with “PIO using MCDMA Bypass mode.” Save the updated .ip file. Reopen the modified .ip file in the Quartus® IP Parameter Editor. Depending on your use case, click “Generate Example Design” or “Generate HDL.”Why does the R-Tile Avalon® Streaming FPGA IP for PCI Express* Design Example simulation fail when using the Questa*-Altera® FPGA Edition Software?
Description Due to a problem in the Quartus® Prime Pro Edition Software version 25.1 and later, simulation of the R-Tile Avalon® Streaming FPGA IP for PCI Express* Design Example with PIPE mode enabled will fail when using the Questa*-Altera® FPGA Edition Software. Refer to the R-Tile Avalon® Streaming FPGA IP for PCI Express* Design Example User Guide Version Found: 25.1 Resolution To work around this issue, do one of the following: Generate the R-Tile Avalon® Streaming FPGA IP for PCI Express* Design Example with PIPE Mode Disabled when simulating with the Questa*-Altera® FPGA Edition Software or, Use full version of the Questasim* Software to simulate the R-Tile Avalon® Streaming FPGA IP for PCI Express* Design Example with PIPE Mode enabled. A patch is NOT available to fix this issue This problem is scheduled to be fixed in a future release of the Quartus® Prime Pro Edition software.Why do I unexpectedly observe intermittent DDM Errors?
Description Beginning January 10, 2026, executing commands in the terminal or GUI of Quartus® Prime Pro Edition software, Quartus Embedded Edition software or select standalone tools may cause the software or tool to crash with an error similar to the crash signature shown below. This error affects: Quartus Prime Pro Software versions v23.3 through v25.3.1 Standalone Quartus Prime Pro Programmer v23.3 through v25.3.1 Standalone Quartus Prime Pro Embedded Edition v25.3 and v25.3.1 Standalone Quartus Prime Pro Power Thermal Analyzer v25.3 through v25.3.1 This issue is not observed in Quartus Prime Pro Edition versions 23.2 or prior or Quartus Prime Standard Edition. Crash Signature: Error (22912): Unhandled exception: Fatal Error: Assertion failed tools/cpp/ddm/ddm_assessor.cpp:53: DDM_T::verify_token(token) : Cannot identify the client from function assertion_error in tools/cpp/ddm_report/ddm_report_msg.cpp@465 *** Fatal Error: Program termination requested *** *** Below is the stack trace at the time the error occurred. *** The lines beginning "Err Handler" represent frames relating *** to generating this report. *** The point at which the error occurred is somewhere after these lines. *** There may be a few frames representing standard/library code *** before the Quartus frames begin. *** The search for the error should begin with the Quartus frames. *** Unwinder: libunwind *** Stack depth: 15 Quartus 0x24e67: err_terminator() + 0x1bc (ccl_err) Quartus 0xb036a: __cxxabiv1::__terminate(void (*)()) + 0xa (stdc++) Quartus 0xb03d5: (stdc++) Quartus 0xb0628: (stdc++) Quartus 0x1680d: void ddm_throw<DDM_RUNTIME_ERROR>(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> > const&) + 0x26d (ddm_report) Quartus 0x13fae: DDM_REPORT::DDM_ASSERTION_HANDLER::assertion_error(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> >) const + 0xde (ddm_report) Quartus 0x12a52: DDM_REPORT::ASSERTION_HANDLER::error(std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> >) + 0x72 (ddm_report) Quartus 0x13e64: DDM_REPORT::detail::assert_at_line(char const*, char const*, int, char const*, ...) + 0x1b4 (ddm_report) Quartus 0x205fb0: ddm_set_lassessor(DDM_T_ASSESSOR*, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> > const&) + 0x60 (ddm) Quartus 0xf4445: DMS_MANAGER::DMS_MANAGER() + 0x5c5 (dni_dms) Quartus 0xf45b2: DMS_MANAGER::get() + 0x7a (dni_dms) Quartus 0xf6db4: _GLOBAL__sub_I_dms_manager.cpp + 0x58 (dni_dms) Quartus 0x647e: (ld-linux-x86-64) Quartus 0x6568: (ld-linux-x86-64) Quartus 0x202ca: (ld-linux-x86-64) Resolution To work around this problem: For Windows machines Download and unzip the Quartus Prime Pro version zip file that matches your Quartus Prime Pro version from this KDB. Double click on the executable ending in “windows.exe”. When the GUI pops up, press Next. Note that the GUI may look slightly different depending on the version of Quartus you are using. Accept the license agreement Specify the directory where the patch needs to be applied which may be a different location than Quartus install if you have standalone tools in a different directory from your Quartus Prime Pro software installation. Keep “Allow Patch to be uninstalled” selected. Select the software in which to install the patch: The patch will install in the directory of the software or tool you have selected. You will see an uninstall directory for the patch in your software or tool folder where patch is installed; it will contain an executable to uninstall the patch if required for any reason. To confirm patch is installed, you can run quartus_sh -v or corresponding version command for your tool via command line. Alternatively, you can Open Quartus in the GUI and select Help → About Quartus Prime in the main menu. If you are opening up a standalone tool you will navigate to Help-> About <tool_name>. For Linux machines: Download and unzip the Quartus Prime Pro version zip file that matches your Quartus Prime Pro version from this KDB. Ensure you run chmod +x on the file ending with linux.run. Run in the command line: ./<installation_patch_run_file>. When GUI pops up, press Next. Note that the GUI may look slightly different depending on the version of Quartus you are using. Accept the license agreement Specify the directory where the patch needs to be applied which may be a different location than Quartus install if you have standalone tools in a different directory from your Quartus Prime Pro software installation. Keep “Allow Patch to be uninstalled” selected. Select the software in which to install the patch: The patch will install in the directory of the software or tool you have selected. You will see an uninstall directory for the patch in your software or tool folder where patch installed; it will contain an executable to uninstall the patch if required for any reason. To confirm patch is installed, you can run ./quartus_sh -v or corresponding version command for your tool via command line. Alternatively, you can Open Quartus in the GUI and select Help → About Quartus Prime in the main menu. If you are opening up a standalone tool you will navigate to Help-> About <tool_name>. This issue is scheduled to be fixed in a future release of the Quartus Prime Pro Edition Software. The below table lists the patches that are available and the associated patch number. The patch zip files are attached to the KDB below: Quartus Prime Pro Edition Version Patch Number 23.3 0.52 23.4 0.70 23.4.1 1.01 24.1 0.52 24.2 0.64 24.3 0.35 24.3.1 1.29 25.1 0.36 25.1.1 1.31 25.3 0.27 25.3.1 1.02Why does the slew rate value become unset after upgrading External Memory Interfaces (EMIF) IP in Agilex™ 7 FPGA F-Series and I-Series devices?
Description Due to a problem in the Quartus® Prime Pro Edition Software version 24.3.1 and earlier, the slew rate values in the FPGA I/O tab of External Memory Interfaces (EMIF) IP might change to unset after upgrading the IP to a newer version. Resolution To work around this problem, follow these steps: Toggle the Use default I/O settings checkbox. Change slew rate to desired settings. This problem is fixed beginning with the Quartus® Prime Pro Edition Software version 25.1.Why does the SPI (4 Wire Serial) IP report hold violations in Timing Analyzer?
Description Due to a problem in the Quartus® Prime Pro Edition Software version 25.3.1 and earlier, you might see hold timing violations during Timing Analyzer when using the SPI (4 Wire Serial) IP. The SPI IP generates an SDC file that includes the following incorrect constraint: create_generated_clock -name spi_gen_clk -divide_by {4} -source [get_pins $ipath|tx_holding_primed|clk] [get_pins $ipath|SCLK_reg|q] This constraint can cause hold timing violations between the spi_gen_clk and the external clock, making timing closure difficult—especially in designs with multiple SPI instances. This problem does not occur in the Quartus® Prime Standard Edition Software, where such an SDC constraint is not generated for the SPI IP. Resolution To work around this problem: Remove the incorrect constraint from the IP-generated SDC file: Delete the following line: create_generated_clock -name spi_gen_clk -divide_by {4} -source [get_pins $ipath|tx_holding_primed|clk] [get_pins $ipath|SCLK_reg|q] This problem is scheduled to be resolved in a future release of the Quartus® Prime Pro Edition Software.Internal Error: Sub-system: QPR, File: /quartus/comp/qpr/qpr_route_mask_generator_details.h, Line: 594
Description Due to a problem in Quartus® Prime Pro Edition Software versions 25.1 and 25.1.1, you might see this internal error at the fitter stage when compiling a Partial Reconfiguration (PR) implementation that uses a global reset on fast input/output registers. The base revision compiles successfully, the error occurs only in PR implementations with this global reset usage. Resolution To work around this problem in the Quartus® Prime Pro Edition Software v25.1.1 or v25.1, download and install the patches below. This problem is fixed beginning with the Quartus® Prime Pro Edition Software version 25.3.1.Error(24244): Found an error when generating the IBIS Output File for board analysis
Description Due to a problem is Quartus® Prime Pro Edition Software version 25.3, you might see this error when generating this IBIS files. This problem only occurs on Windows* OS. This problem occurs because the quartus_py.exe file has changed location in the installation directory but the IBIS writer still calls the file from the previous location. Resolution To work around this problem, copy the file quartus_py.exe from this directory \altera_pro\25.3\qcore\bin64\quartus_py.exe to this one \altera_pro\25.3\quartus\bin64\quartus_py.exe This problem is scheduled to be fixed in a future release of the Quartus® Prime Pro Edition Software.
