What are the issues in Nios® V processor for designs targeting Agilex® 27 FPGA device?

Description

Due to a problem in the Quartus^® Prime Pro Edition software version 26.3, Nios® V Debug IP fails to execute dmcontrol.hartreset on a halted Nios® V processor.

This is because there is a bug in Nios® V/c processor, when servicing dmcontrol.hartreset request while halted.

If the processor is a running state, dmcontrol.hartreset can be executed successfully.

Resolution

To work around this problem in the Quartus^® Prime Pro Edition software version 26.3 (select one),

• Use dmcontrol.ndmreset to reset the processor at any states.
• Use dmcontrol.hartreset only when the processor is at running state.

 

This problem is currently scheduled to be resolved in a future release of the Quartus^® Prime Pro Edition Software.