Why are Toolkit instances (ETK, TTK) not detected for Agilex® 7 F-Tile Ethernet Hard IP in System-console after device configuration?
Description In designs using multiple instances of the Agilex® 7 F-Tile Ethernet Hard IP with Toolkit support enabled (ETK and TTK), the Toolkit instances may sometimes not be detected in the System Console GUI after programming the FPGA with the design .sof file. This behavior is caused by a problem in the F-Tile Ethernet Hard IP configuration. Resolution A patch is available to fix this problem for the Quartus Prime Pro Edition software version 25.3.1 and 26.1. Download and apply attached patches (1.32, 0.35) for intended Quartus version, which restores Toolkit visibility in the System Console GUI for the F-Tile Ethernet Hard IP. This problem is fixed beginning with the Quartus Prime Pro Edition software version 26.1.1.Why does the Agilex® 7 FPGA HPS EMIF and fabric EMIF hang after core reconfiguration when both interfaces share the same IO bank in x72 configuration?
Description Due to a problem in the Quartus® Prime Pro Edition Software version 24.2, when Agilex® 7 FPGA F-Series and I-Series HPS EMIF and fabric EMIF share the same IO bank in x72 configuration and the design operates in HPS-first mode, the initial configuration can succeed, but subsequent core reconfigurations can cause the fabric EMIF calibration firmware to hang for designs targeting in Agilex® 7 FPGA F-Series and I-Series devices. The observed failure signature is that, after the FPGA is reconfigured without a full board power cycle, the fabric EMIF no longer responds correctly and the calibration flow does not assert cal_success or cal_fail. Resolution A patch is available to fix this problem for the Quartus® Prime Pro Edition Software version 24.2. Download and install patch 0.70fw below. quartus-24.2-0.70fw-linux.zip quartus-24.2-0.70fw-readme.zip quartus-24.2-0.70fw-windows.zip A patch is available to fix this problem for the Quartus® Prime Pro Edition Software version 25.1.1. Download and install patch 1.54fw below. quartus-25.1.1-1.54fw-linux.zip quartus-25.1.1-1.54fw-readme.zip quartus-25.1.1-1.54fw-windows.zip This problem is resolved in Quartus® Prime Pro Edition Software version 26.1.1.Why does the F-Tile JESD204C FPGA IP Example Design fail to generate when the data rate above 23 Gbps with a target development kit selected, showing an error requiring VSR_MODE_HIGH_LOSS even though this option is unavailable in the IP GUI?
Description Due to a problem in the Quartus® Prime Pro Edition software version 25.3, the VSR_MODE_HIGH_LOSS option was removed. User is expected to use VSR_MODE_LOW_LOSS instead, which provides the same functionality previously available in both modes. However, this change is not correctly reflected in the F-Tile JESD204C IP GUI. Resolution To work around this problem in the Quartus® Prime Pro Edition software version 25.3, download and install the patches below. This problem is fixed beginning with the Quartus® Prime Pro Edition software version 25.3.1.Why is there "sopcinfo2swinfo.exe: command not found" when running sopc-create-header-files under WSL, or Docker under Windows?
Description An error message like this: sopc-create-header-files: line 182: sopcinfo2swinfo.exe: command not found sopc-create-header-files: sopcinfo2swinfo.exe --input=./peripheral_subsys.sopcinfo --output=/tmp/sopc-create-header-files.1312.tmp.swinfo failed will be seen in the Quartus ® Prime Pro Edition Software version 25.3.1 and earlier, when using the sopc-create-header-files script within the Linux version of the Quartus ® Prime Pro Edition Software, running on the Microsoft* Windows operating system. The Linux version of the tools can be installed under Windows* using WSL, WSL2 or Docker. In all of these cases, the sopc-create-header-files script detects that it is running under Windows* and looks for an internal tool with the suffix “.exe”. However, since the Linux version has been installed, the tool does not have that suffix and so cannot be found by the sopc-create-header-files script. Resolution To work around the problem, either switch to using a Windows* installation of the Quartus® Prime Pro Edition Software, or follow these steps to continue using the Linux installation under Windows*: Under Linux, use the command “which sopc-create-header-files” to find the location of the script. Copy the script from this location to another location of your choice. Make the newly copied script version writable using the command: chmod +w <path to newly copied script> Modify your newly copied script version. Find the following line: windows_exe=.exe and either remove it or add a single # symbol at the start to comment it Use your newly modified version of the script instead of the installed version. This will now execute correctly.Why does GD55LB02GE QSPI flash fail in Linux* in FPGA SoC device?
Description If you use Linux* version between socfpga-6.0 and socfpga-6.12.43-lts with GD55LB02GE QSPI flash, you may fail to mount the file system in Linux if it’s stored in GD55LB02GE. This is caused by the gigadevice.c in these versions. Resolution This issue is fixed in socfpga-6.12.43-lts and afterwards. You can upgrade Linux source code to this version, or comment out the GD55LB02GE entry in gigadevice.c in old versions.Why does the EMIF and Ethernet IP report hold violations in Timing Analyzer?
Description Due to a problem in the Quartus® Prime Pro Edition Software version 25.1.1 and 24.3, you might see hold timing violations in Timing Analyzer when using the EMIF and Ethernet IPs. This problem only refers to Agilex™ 7 FPGA devices. Resolution This problem has been resolved in Quartus® Prime Pro Edition Software version 25.3.Why does Ashling* RiscFree* IDE for Altera* FPGA software reports unresolved inclusion warnings, despite a successful build of Nios® V processor software project?
Description Due to a problem in multiple versions of Ashling* RiscFree* IDE for Altera® FPGA, the unresolved inclusion warning might occur for any Nios ® V processor software projects. Note that, the warning is harmless. The affected software project will still build successfully. This is caused by a bug in the Indexer of Ashling* RiscFree* IDE, which fails to search for the relevant project files. The affected Ashling* RiscFree* IDE for Altera FPGA are: Software version v25.1.1 (dated as 31 st Jan 2025) Software version v25.2.1 (dated as 9 th May 2025) Software version v25.3.1 (dated 1 st August 2025) Resolution This problem is currently scheduled to be resolved in future release of Ashling* RiscFree* IDE for Altera FPGA software version v26.1.0 (dated as 19 th Dec 2025). Meanwhile, you may safely ignore this warning, as it does not affect the functionality of your project. If needed, please refer to the related article for the recommended workaround. Related Article: Ahsling RiscFree IDE 25.1.1: Unresolved inclusion | Altera CommunityWhy does the Quartus® Logic Generation Tool report the TX Equalizer settings as 'Ignored' when creating a Tx-only example design for F-Tile JESD204C IP?
Description Due to a problem in the Quartus® Prime Pro Edition software version 23.4, you may observe the Quartus Logic Generation Tool incorrectly reports the TX Equalizer settings as 'Ignored' when creating a TX-only example design for F-Tile JESD204C IP. Resolution To work around this problem, you can manually configure the analog parameter instances in the .qsf file. set_instance_assignment -name HSSI_PARAMETER "txeq_main_tap=<parameters value>” -to tx_serial_data[*] set_instance_assignment -name HSSI_PARAMETER "txeq_pre_tap_1=< parameters value >" -to tx_serial_data[*] set_instance_assignment -name HSSI_PARAMETER "txeq_pre_tap_2=< parameters value >" -to tx_serial_data[*] set_instance_assignment -name HSSI_PARAMETER "txeq_post_tap_1=< parameters value >" -to tx_serial_data[*] set_instance_assignment -name HSSI_PARAMETER "txeq_main_tap=< parameters value >" -to "tx_serial_data_n[*]" set_instance_assignment -name HSSI_PARAMETER "txeq_pre_tap_1=< parameters value >" -to "tx_serial_data_n[*]" set_instance_assignment -name HSSI_PARAMETER "txeq_pre_tap_2=< parameters value >" -to "tx_serial_data_n[*]" set_instance_assignment -name HSSI_PARAMETER "txeq_post_tap_1=< parameters value >" -to "tx_serial_data_n[*]" This problem is fixed beginning with the Quartus® Prime Pro Edition Software version 24.3.1.What is the difference between SDI configuration compared to SDI_NATIVE and SDI_STATIC configurations in the F-tile PMA/FEC Direct PHY IP and F-tile PMA/FEC Direct PHY Multirate IP?
Description Due to a problem in the Quartus® Prime Pro Edition software version 25.3.1, the F-tile PMA/FEC Direct PHY IP and F-tile PMA/FEC Direct PHY Multirate IP has incorrectly displayed the SDI_NATIVE and SDI_STATIC configuration as part of the FGT PMA configuration rules parameter options. These options are not applicable and should not be used when you are operating configuration rules in SDI mode. Resolution To work around this problem in the Quartus Prime Pro Edition software version 25.3.1, you should select the SDI configuration under the F-tile PMA/FEC Direct PHY IP and F-tile PMA/FEC Direct PHY Multirate IP and apply the below HSSI QSF assignment in your Quartus Setting Files (.qsf). Ensure the correct HSSI QSF assignment is being added following the parameters/configurations listed in the table. FGT PMA Configuration Rules PMA Mode Adaptation Mode Action required for user: Update HSSI QSF Assignment in .qsf file SDI TX Simplex RX Simplex Duplex Manual (for Data Rate <7Gbps i.e. 1.485/1.4835 Gbps 2.97/2.967 Gbps 5.94 Gbps) Update QSF file to add in RX_TUNING_HINT_SDI_STATIC tuning hint. This HSSI QSF assignment need to be set for every F-tile PMA/FEC Direct PHY IP instances in the design for all TX Simplex instances, RX Simplex instances or Duplex instances. set_instance_assignment -name HSSI_PARAMETER "TX_TUNING_HINT=TX_TUNING_HINT_SDI_STATIC" -to <instance> set_instance_assignment -name HSSI_PARAMETER "RX_TUNING_HINT=RX_TUNING_HINT_SDI_STATIC" -to <instance> exm: set_instance_assignment -name HSSI_PARAMETER "RX_TUNING_HINT=RX_TUNING_HINT_SDI_STATIC" -to rx_inst|sdi_mr_rx_sys_inst|rx_phy|rx_phy|U_sec_profile2|sec_profile_2|dphy_hip_inst|persystem[0].perxcvr[0].fgt.rx_ux.x_bb_f_ux_rx Native (for Data Rate > 7Gbps i.e. 11.880 Gps) 1. Update QSF file to add in RX_TUNING_HINT_SDI_NATIVE tuning hint. This HSSI QSF assignment need to be set for every F-tile PMA/FEC Direct PHY IP instances in the design for every TX Simplex instances, RX Simplex instances or Duplex instances. set_instance_assignment -name HSSI_PARAMETER "TX_TUNING_HINT=TX_TUNING_HINT_SDI_NATIVE" -to <instance> set_instance_assignment -name HSSI_PARAMETER "RX_TUNING_HINT=RX_TUNING_HINT_SDI_NATIVE" -to <instance> exm: set_instance_assignment -name HSSI_PARAMETER "RX_TUNING_HINT=RX_TUNING_HINT_SDI_NATIVE" -to rx_inst|sdi_mr_rx_sys_inst|rx_phy|rx_phy|U_base_profile|directphy_f_0|dphy_hip_inst|persystem[0].perxcvr[0].fgt.rx_ux.x_bb_f_ux_rx 2. Update QSF file to add in rxeq_vga_gain=37 setting. This HSSI QSF assignment is required to be set for every F-tile PMA/FEC Direct PHY IP RX Simplex instances or Duplex instances. set_instance_assignment -name HSSI_PARAMETER "rxeq_vga_gain=37" -to <instance> exm: set_instance_assignment -name HSSI_PARAMETER "rxeq_vga_gain=37" -to rx_inst|sdi_mr_rx_sys_inst|rx_phy|rx_phy|U_base_profile|directphy_f_0 |dphy_hip_inst|persystem[0].perxcvr[0].fgt.rx_ux.x_bb_f_ux_rx This problem is scheduled to be fixed in a future release of the Quartus® Prime Pro Edition software.What is the difference between HDMI configuration compared to HDMI_NATIVE and HDMI_STATIC configurations in the F-tile PMA/FEC Direct PHY IP?
Description Due to a problem in the Quartus® Prime Pro Edition software version 25.3.1, the F-tile PMA/FEC Direct PHY IP has incorrectly displayed the HDMI_NATIVE and HDMI_STATIC configuration as part of the FGT PMA configuration rules parameter options. These options should not be used when you are operating in HDMI mode. Resolution To work around this problem In the Quartus Prime Pro Edition software version 25.3.1, you should select the HDMI configuration under the F-tile PMA/FEC Direct PHY IP and apply the below HSSI QSF assignment in your Quartus Setting Files (.qsf). Ensure the correct HSSI QSF assignment is being added following the parameters/configurations listed in the table. FGT PMA Configuration Rules PMA Mode Adaptation Mode Action required for user: Update HSSI QSF Assignment in .qsf file HDMI RX Simplex TX Simplex Manual (for Data Rate: 3Gbps, 6Gbps) Update QSF file to include add in TX/RX_TUNING_HINT_HDMI_STATIC tuning hint. This HSSI QSF assignment need to be set for every F-tile PMA/FEC Direct PHY IP instances in the design for every TX Simplex instance or RX Simplex instance in your design. set_instance_assignment -name HSSI_PARAMETER "TX_TUNING_HINT=RX_TUNING_HINT_HDMI_STATIC" -to <instance> set_instance_assignment -name HSSI_PARAMETER "RX_TUNING_HINT=TX_TUNING_HINT_HDMI_STATIC" -to <instance> exm: set_instance_assignment -name HSSI_PARAMETER "TX_TUNING_HINT=TX_TUNING_HINT_HDMI_NATIVE" -to u_hdmi_tx_top|gxb_tx_inst|u_tx_phy_3|tx_phy_6g|dphy_hip_inst|persystem[0].perxcvr[0].fgt.tx_ux.x_bb_f_ux_tx -entity agx_hdmi21_frl_demo exm: set_instance_assignment -name HSSI_PARAMETER "RX_TUNING_HINT=RX_TUNING_HINT_HDMI_NATIVE" -to u_hdmi_rx_top|gxb_rx_inst|u_rx_phy_3|rx_phy_6g|dphy_hip_inst|persystem[0].perxcvr[0].fgt.rx_ux.x_bb_f_ux_rx -entity agx_hdmi21_frl_demo Native (for Data Rate: 8Gbps, 10Gbps, 12Gbps) 1. Update QSF file to add in TX/RX_TUNING_HINT_HDMI_NATIVE tuning hint. This HSSI QSF assignment need to be set for every F-tile PMA/FEC Direct PHY IP instances in the design for every TX Simplex instance or RX Simplex instance in your design. set_instance_assignment -name HSSI_PARAMETER "TX_TUNING_HINT=RX_TUNING_HINT_HDMI_NATIVE" -to <instance> set_instance_assignment -name HSSI_PARAMETER "RX_TUNING_HINT=TX_TUNING_HINT_HDMI_NATIVE" -to <instance> exm: set_instance_assignment -name HSSI_PARAMETER "TX_TUNING_HINT=TX_TUNING_HINT_HDMI_NATIVE" -to u_hdmi_tx_top|gxb_tx_inst|u_tx_phy_0|tx_phy_12g|dphy_hip_inst|persystem[0].perxcvr[0].fgt.tx_ux.x_bb_f_ux_tx -entity agx_hdmi21_frl_demo exm: set_instance_assignment -name HSSI_PARAMETER "RX_TUNING_HINT=RX_TUNING_HINT_HDMI_NATIVE" -to u_hdmi_rx_top|gxb_rx_inst|u_rx_phy_0|rx_phy_12g|dphy_hip_inst|persystem[0].perxcvr[0].fgt.rx_ux.x_bb_f_ux_rx -entity agx_hdmi21_frl_demo 2. Update QSF file to add in rxeq_vga_gain=37 setting. This HSSI QSF assignment need to be set for every F-tile PMA/FEC Direct PHY IP instances in the design for every RX Simplex instances. set_instance_assignment -name HSSI_PARAMETER "rxeq_vga_gain=37" -to <rx_instance>. exm: set_instance_assignment -name HSSI_PARAMETER "rxeq_vga_gain=37" -to u_hdmi_rx_top|gxb_rx_inst|u_rx_phy_0|rx_phy_12g|dphy_hip_inst|persystem[0].perxcvr[0].fgt.rx_ux.x_bb_f_ux_rx -entity agx_hdmi21_frl_demo This problem is scheduled to be fixed in a future release of the Quartus Prime Pro Edition software.