Knowledge Base Article
Why does the F-Tile JESD204C FPGA IP Example Design fail to generate when the data rate above 23 Gbps with a target development kit selected, showing an error requiring VSR_MODE_HIGH_LOSS even though this option is unavailable in the IP GUI?
Description
Due to a problem in the Quartus® Prime Pro Edition software version 25.3, the VSR_MODE_HIGH_LOSS option was removed. User is expected to use VSR_MODE_LOW_LOSS instead, which provides the same functionality previously available in both modes. However, this change is not correctly reflected in the F-Tile JESD204C IP GUI.
Resolution
To work around this problem in the Quartus® Prime Pro Edition software version 25.3, download and install the patches below.
This problem is fixed beginning with the Quartus® Prime Pro Edition software version 25.3.1.
Updated 20 days ago
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