Error: niosv_g_dcache.sv: part-select direction is opposite from prefix index direction

Description

Due to a problem in the:

• Quartus® Prime Pro Edition Software version 24.3.1, 25.1, and
• Quartus® Prime Standard Edition Software version 24.1

When the Nios® V/g processor is configured with No Data Cache and enabled with Error Detection and ECC Status Reporting, performing Analysis and Synthesis fails with the error "niosv_g_dcache.sv: part-select direction is opposite from prefix index direction".

Note that this issue has no relationship with No Instruction Cache.

Figure. Nios® V/g Processor Setting to Replicate the Error

 

Resolution

To work around this error,

1. Select 1Kbytes Data Cache.
2. Apply a Peripheral Region that covers the whole Nios® V processor’s data_manager address map
3. Enable Error Detection and ECC Status Reporting.

By implementing Peripheral Region, the above settings can emulate an ECC-enabled Nios® V processor system that operates without caches.  

Figure. Workaround (in this example, the whole Nios® V processor’s data_manager address map is 1GB)

 

This problem is scheduled to be fixed in a future release of the Quartus® Prime Edition Software.