Forum Discussion
Occasional ContributorStratix 10 HPS to 25G ethernet interface
Occasional Contributorwe plan to use the 25G Ethernet Stratix 10 IP with MAC+PCS+PMA. We are using this to conenct to a gransmaster cllock for PTP time sync. We have enabled IEEE 1588 in the IP core. also have enabled Enable 10G/25G dynamic rate switching.
We want to know,
- How to controll the switch between 10G and 25G.
- How to interface the 25G IP to the Stratix 10 HPS.
We do not need 25G throughput, just need the phyical interface for IEEE 1588 time sync messaging.
New ContributorAre you using the E-tile on Stratix 10TX or L-tile/H-tile?
If latter, please see the IP guide below for 25G ethernet below. You need the channel_reset port for dynamic switching. It shouldn't be complicated to control the ATX PLLs dynamically to switch between 10G and 25G with a reset.
In terms of interfacing it with the HPS, perhaps you can route 25G's MAC Avalon through HPS with a bridge. I've found a Stratix 10 SoC 10G 1588 PTP design example. Perhaps this design example can point you to a solution.
https://www.rocketboards.org/foswiki/Projects/Stratix10SoCDesignExampleFor10GbeWithIEEE1588PTPCapability
