New Contributor
New ContributorSure. I'm a beginner and just started using Altera's SOC devices. Thank you for your patient guidance.
-- Background
Development environment: Windows 11 + WSL Ubuntu-22.04
EDA tool: Quartus Prime Pro Edition 25.1.1
Device : Stratix 10 1SX110HN2
U-Boot version: u-boot-socfpga-socfpga_v2025.04
ATF version: arm-trusted-firmware-socfpga_v2.13.0
Hardware Project: Refer to the qsys architecture of GHRD-s10-htile-soc-devkit-oobe-baseline. The HPS I/O is different from that of GHRD (EMIF/SD/EMAC/UART/I2C). The Placement is consistent with the hardware board, and the top-level packaging of the engineering is also similar to GHRD
-- Question: I intended to start u-boot using the JTAG loading method, but it seems that I got stuck at the u-boot startup stage.
The hardware project compilation was successful and the sof file was generated
Uboot and ATF have been compiled successfully
The conversion of u-boot-spl-dtb.bin to u-boot-spl.ihex was successful.
The u-boot-spl.ihex and sof files were packaged into fsbl.sof, but an error occurred.
My understanding is that if the fsbl.sof file is generated correctly, JTAG can load it and then start u-boot. However, unfortunately.
I attempted to package u-boot-spl-dtb.hex and sof files into fsbl.sof. It was successful. However, after loading this sof via JTAG, there was no output on the serial port. I'm quite puzzled.
I have referred to this link:
https://altera-fpga.github.io/rel-25.1.1/embedded-designs/stratix-10/sx/soc/boot-examples/ug-linux-boot-s10-soc/#running-u-boot-with-the-debugger-from-command-line
Including the case where Linux boots via an SD card, which is quite different from my current problem.
Including the u-boot debugging via the command line, but it requires the hps_debug.sof. However, my sof is not the debug.sof.
Including debugging u-boot with Arm DS, I installed the Arm DS 2022.2 version. Since I don't have a trial version license, I was unable to debug. Could you please tell me if other versions of Arm DS support debugging? Because the newer versions of the tools can obtain a license.
Regular ContributorHi
If you are using the command line below are you able to attach the fsbl to the bitstream? If not what is the error you are looking at?
quartus_pfg -c stratix10-ed-gsrd/install/designs/s10_htile_soc_devkit_oobe_baseline.sof ghrd.jic \
-o device=MT25QU128 \
-o flash_loader=1SX280HU2F50E1VGAS \
-o hps_path=u-boot-socfpga/spl/u-boot-spl-dtb.hex \
-o mode=ASX4 \
-o hps=1
Is the u-boot-spl-dtb.hex in the same folder as the sof file that you are using to generate in the GUI?
New ContributorI used the quartus_pfg -c batch processing command to package the sof file and hex file into fsbl.sof. All these files are in the same path. Please refer to the following figure for the batch processing:
As I mentioned in my previous answer:
1. If the hex file is u-boot-spl-dtb.hex, the above packaging process can be completed, and the generated fsbl.sof can also be loaded via JTAG. However, the system does not start after the loading is completed.
2. If the hex file is converted from u-boot-spl-dtb.bin to u-boot-spl.ihex, the above packaging process will fail, and the specific information is as follows:
Regular ContributorHi grit
One last suggest is could you remove the " ./ " in front of the u-boot-spl.hex as a final test?
If that still have error could you try sharing me your sof and hex file for testing.
