Forum Discussion
HPark14
Occasional Contributor
Occasional ContributorF2SDRAM fails to synthesize with custom logic
Hello guys, We are using Agilex5 SOC F2SDRAM bridge. I am trying to connect custom logic to the F2SDRAM, but it absolutely refuses to synthesize unless I export the signals directly to the top-lev...
KelvinK_Altera
New Contributor
New ContributorHi Hudson,
To further debug, can you share the expended the error message regarding to the F2SDRAM error.
HPark14Occasional Contributor
Occasional ContributorAgain I revised my test module
It's very simple. but why quartus always says RDATA like a parrot?
