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binupr's avatar
binupr
Icon for Occasional Contributor rankOccasional Contributor
3 years ago
Solved

Xcelium support for Agilex P-tile PCIe simulations

Hi there, I am creating a PCIe controller targeting Agilex F series device. Wanted to run the example design on Cadence Xcelium simulator. When I ran the generated script for Xcelium, I got the belo...
Simulation
  • binupr's avatar
    binupr
    3 years ago

    Hi Wincent,

    Apologies for the delay in responding to your prior follow-up email.

    Yes, you can close this ticket.

    Thank you for the support.

    Regards

    Binu

Wincent_Altera's avatar
Wincent_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi

The solution is provided, and the R-tile design is able to run in Xcelium simulation environment.

We have not hear from you and this Case is idling. It is not recommended to idle for too long.

Therefore following our support policy, I have to put this case in close status. My apologies if any inconvenience cause

Hence, This thread will be transitioned to community support.

If you have a new question, feel free to open a new thread to get support from Intel experts.

Otherwise, the community users will continue to help you on this thread. Thank you

If your support experience falls below a 9 out of 10, I kindly request the opportunity to rectify it before concluding our interaction. If the issue cannot be resolved, please inform me of the cause so that I can learn from it and strive to enhance the quality of future service experiences.

Regards,

Wincent_Intel