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tessier5894's avatar
tessier5894
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6 days ago

Xcelium Simulation using XRUN with Verilog Configurations defining Library Search Order

I have an AgileX based design using Quartus 26.1.0.110 and Simulating with Xcelium 24.09.005. If I simulate the FPGA entirely standalone using this combination and embracing the xcelium/xcelium_setu...
Simulation
RichardT_altera's avatar
RichardT_altera
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2 hours ago

Does your design contain any Altera IP? If so, could you let us know which IPs are being used?
Additionally, could you share a test case and the steps required to reproduce the issue?
This information will help us investigate the issue and determine the root cause more effectively.
Thanks.

Regards,
Richard Tan