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junyoung2
New Contributor
New Contributorwire assignment in verilog
Hello, I have a question while I was writing the code. I made a code wire [15:0] A; and I declared input B; and I declared this signal as assign A = {8{B}};. When I declared this, the top 8 bits of s...
junyoung2New Contributor
New ContributorThe warning message for the bit size does not appear in the Questa Compiler. Is there a way to check if there is a code error for an unallocated bit like the above?
