Unexpected memory generated in Kernels by the OpenCL compiler

Hi,

I have tried v17.1 and v18.1, both has the same results. I am using the DE5-net board with an Stratix-V GXA7 FPGA on board.

Can such opimization be controlled manually by using pragma or compilation options ?

I did more experiments on different implementations with different resource utilization rates. It turns out that when the overal resource utilization of the implemented design is relative small, there will be no memory consumptions by these entities. Is it possible these memory blocks are generated during P&R by quartus rather than the opencl compiler ?

If it is generated by the aoc compiler, the numbers should be collectable and reported in the report.html file.