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UserID4331231's avatar
UserID4331231
Icon for Occasional Contributor rankOccasional Contributor
6 months ago

understanding Hex file creation

In my FPGA project I have couple of memory which I plan on using as Configuration memory and general purpose memory. In Platform designer I made my project and I intend to assign them some initial va...
Compilation
Hdl
sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
6 months ago

No it means there's a mismatch between the RAM(s) you've created and the .hex files. How did you create the RAM? As IP or through HDL inference? What options did you choose?