TimeQuest strange behavior - seems like a bug in PLL output clock visualization

Hi Abe ,

Thank you very much for your answer.

It can be a real design case, where clocks are shifted on board, so we need a way to describe it in TQ.

So, again it looks that derive_pll_clocks can't be used with input clocks with phase shift, in that case we need to manually write generated_clocks, which is inconvenient.

In my opinion, it is a bug and it will be good if it will be corrected.

--

Best regards,

Ivan