TEMPERATURE SENSOR IP in STRATIX10 SX , READ INCORRECT VALUE

Hi JwChin,

I am the local Altera-dedicated FAE (with Arrow) working with Will on this problem.

I am attaching 3 screenshots of what Will is seeing in his system.

The Voltage_IP and Voltage_IP_2 (zoomed in picture of Voltage_IP) show Will sending a command but getting absolutely no response back. Voltage_IP shows the command being entered, Ready going low and then eventually going high with nothing happening in between. One thing that looks suspicious to Will and I is that Start of Packet and End of Packet are both a 1 and never go to 0.

Voltage_IP_3 shows the Ready signal never going high after a reset. Since Ready never goes active Will's state machine never issues a command which would be expected.

Could the problem that Will is seeing caused by the issue described here? -> https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/component/2018/the-clocks-and-resets-in-user-logic-must-be-gated-until-configur.html?wapkw=should+clocks+and+resets+in+user+logic+be+gated+until+the+configuration+process+is+completed

Steve Zack