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Scarlet's avatar
Scarlet
Icon for New Contributor rankNew Contributor
2 years ago

Strange issues on FPGA

Hi All, I wrote a simple finite state machine Verilog code and ran it on the FPGA, but it never runs stably. My environment: - MAX10 10m08 EVB - Quartus Prime Lite 23.1.1 My Verilog Code: ...
Compilation
Hdl
RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
1 year ago

Thank you for the confirmation.


Now, I will transitioning this thread to community support. If you have any further questions or concerns, please don't hesitate to reach out. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support.

The community users will be able to help you on your follow-up questions.


Thank you and have a great day!


Best Regards,

Richard Tan