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Altera_Forum's avatar
Altera_Forum
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13 years ago

std_logic_vector VS unsigned

I have the following type definitions 


    subtype msgBlock_t is std_logic_vector((Z-1) downto 0);
    subtype msgBlock_u_t is unsigned((Z-1) downto 0);
    type msgBlocks_t is array((K_B-1) downto 0) of msgBlock_t;
    type msgBlocks_u_t is array((K_B-1) downto 0) of msgBlock_u_t;
    signal shMsgBlocks_u: msgBlocks_u_t;
    signal shMsgBlocks: msgBlocks_t;

I tried to convert the unsigned vector into a std_logic_vector using 


shMsgBlocks = msgBlocks_t(shMsgBlocks_u);

but it doesn't work so now I'm using 


        c_g: for i in 0 to K_B-1 generate
            c_g_i: shMsgBlocks(i) <= std_logic_vector(shMsgBlocks_u(i));
        end generate c_g;

but when I do a XOR operation: 


    xor_L1: for i in 0 to (K_B/2)-1 generate
        xor_L1_i: out_xor_L1 <= shMsgBlocks(2*i) xor shMsgBlocks(2*i+1);
    end generate xor_L1;

the following error appears

Error (10327): VHDL error at lambda.vhd(112): can't determine definition of operator ""xor"" -- found 0 possible definitions

I know that std_logic_vector has to be used for memories/registers, while the unsigned type for binary numbers without sign.

I need to use the unsigned type in my circuit because of the rol (rotate left) function.

I cannot avoid to mix the two types.

What is better to do in these cases ?

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    there is nothing wrong with unsigned for memories and registers. I avoid std_logic_vector whenever another type is more appropriate.

    You havent shown the definition of out_xor_L1.
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    subtype msgBlock_t is std_logic_vector((Z-1) downto 0);	
type xorL1_t is array ((K_B/2)-1 downto 0) of msgBlock_t;

  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    Shouldn't there be an index for out_xor_L1, presumed it's of xorL1_t type (array of std_logic_vector)?

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    The xor operation works properly between std_logic_vector or unsigned vectors.

    I need an array of unsigned vectors, that's why I'm using the subtype.

    I replaced all std_logic_vector declarations with unsigned ones and now it works.

    Thank you so much guys.
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    Now it compiles. The problem is that I have a very long vector as input (unsigned(323 downto 0)) and so the Fitter gave me an error because there are not enough pins. Can I store this vector in a pre-initiliazed register ? Or is there something else I can do to avoid this problem?