New ContributorSimulating communication over PCIE
Hello,
I'm trying to perform some tests regarding simulation of the communication between an FPGA and an host PC over a PCIE bus. To simulate the FPGA I use ModelSim-Altera and Quartus II Lite Edition and Xillybus library to perform such communication.
I downloaded the Xillybus demo an synthetized succesfully, but I still don't see any /dev/xillybus_something device file.
I do these tests with the university, so I cannot buy yet an FPGA and my PC doesn't have a PCIE port natively.
I use Ubuntu 20.04 as host OS.
Is it reasonable to do such test? Can you provide me some tips on how to simulate such communication?
Thank you very much for your support.
Hi Luca,
Yes, I don't think this is feasible. The existing PCIe generated testbench and BFM provides a simple method to do basic testing of the application layer logic, and this is not intended to be a substitute for a full verification environment.
