Forum Discussion
Hamza_52
New Contributor
3 years agoSignal Tap Logic Analyzer II Trigger Condition
Hi i am working with DE1-SoC Cyclone V SoC FPGA Board and i am using quartus Prime Lite Edition. I am trying to use Signal Tap Logic Analyzer II but somehow i am not able to configure it correctly my...
Hamza_52
New Contributor
3 years agook as you said that as i have stop signal in my node list so i dont have to used it as trigger in. What if remove it from node list and only use it as trigger in so will that stop the acquisition as soon as stop value gets to 1?
sstrell
Super Contributor
3 years agoNo. Trigger in is just a pre-qualifier for checking trigger condition 1.