Signal Tap II error (261009)
The sof file is programmed/configured successfully, but Signal Tap complains with rather a ridiculous error: (I followed up the guide - create/modify stp by GUI, save/recompile)
Error(261009): Cannot run Signal Tap Logic Analyzer. Signal Tap File is not compatible with the file programmed in your device. The expected compatibility checksum value is 0x5579E704; the value read from your device is 0x5579F714
Isn’t JTAG vindicated from the fact we configure FPGA successfully all the time? The programmer does not allow to check Verify box, only Program/Configure box, simply put, you can't click Verify box, although it is NOT "disabled/gray".
I’ve checked all cases I could find from internet about the Error, but nothing helps.
Sorry I didn't update sooner.
The issue has been resolved by lowering JTAG frequency (default 24M to 6MHz) due to a rather long JTAG cable/connection. What confused me most was the success (or maybe "silent failure") of downloading sof at the default frequency.