set_clock_groups notes

I understand this concern. One thing of note is that the placer/router has two main goals while doing it's thing, meeting timing and reducing wire usage(which increases routability). If it weren't for the second one, then a design with a 5MHz goal would take 10 seconds to place, since the first legal placement would meet timing. So there is a goal of reducing delays, it just usually comes secondary if something else needs that placement/route for better timing. In other words, just because a path is cut, it won't get a 30ns route on it. FIFOs are a good example, in which case it's true that a absolutely huge delay across gray code transfers would probably mess it up, yet almost all designs cut this path and I've never heard of anyone having a problem.