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MichaelL's avatar
MichaelL
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3 months ago

Quartus/Signaltap complains about wrong version

Hello,

we are using Quartus prime V24.1.0 for a rather large project. We have various signaltap files stored within git for analysis. Now, from time to time, it happens that quartus throws the following warning/assertion. Obviously, this assertion can be suppressedwith ENABLE_VHDL_STATIC_ASSERTIONS OFF, and everything is working. However this is no soulution as we want to have ENABLE_VHDL_STATIC_ASSERTIONS ON

Error (22148): VHDL error at sld_ela_control.vhd(1263): Failure: "The design file sld_ela_control.vhd is released with Q
uartus Prime software Version 24.1.0. It is not compatible with the parent entity. If you generated the parent entity us
ing the Signal Tap megawizard, then you must update the parent entity using the megawizard in the current release.": exi
ting elaboration File: c:/intelfpga_pro/24.1/quartus/libraries/megafunctions/sld_ela_control.vhd Line: 1263

If I remove the signaltap(file) entirely, and readd it, everything works. However, this is very annoying and time consuming.

Q1. Why is this assertion triggered in the first place? We do not use any other versions.
Q2. How do I "update the parent entity using the megawizard"? I'm unable to find an "update" option. To me deleting signaltap and re-creating it is not an update.... 

Thanks,
Michael

Compilation
Hdl

19 Replies

  • sstrell's avatar
    sstrell
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    15 days ago

    How is your .stp file set up?  Is there anything unusual about it?  I've never seen issues like this before with the .stp file flow.  

    Is the static assertions setting you mention an assignment you've created in the Assignment Editor?

    • MichaelL's avatar
      MichaelL
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      15 days ago

      sstrell​ My stp. file is straight forward; it was created with the gui: Multiple signals, one trigger window, two triggers (AND and OR). However, what I did change was to add (and remove) a power-up trigger. However this was the first time, I used a power-up-trigger, but I don't think this is the root cause, because previously the same problems (with version 24.3) existed, and there was no power-up trigger 

      Yes, these settings enable Evaluation of the above mentioned assertion. If I deactivate them (never tried VHDL and SV individually) and cause the failure.

       

      P.S. Please be aware, that I'm ooo from 13. Feb to 13 Mar, so please don't close this threat in the meanwhile!

  • sstrell's avatar
    sstrell
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    17 days ago

    Try turning off the "Enable Signal Tap Logic Analyzer" checkbox from the settings and do a full compile (not just synthesis).  Then turn it back on and do another full compile.  If this was a brand new .stp file, your error doesn't make sense.

    • MichaelL's avatar
      MichaelL
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      16 days ago

      sstrell​ Unfortunately, this had no effect.

      Error(22148): VHDL error at sld_ela_control.vhd(1263): Failure: "The design file sld_ela_control.vhd is released with Quartus Prime software Version 25.3.0. It is not compatible with the parent entity. If you generated the parent entity using the Signal Tap megawizard, then you must update the parent entity using the megawizard in the current release."

      Still what's very odd, that obviously this is only a (wrongfully triggered) assertion... When deactivating "static assertion support" everything "works" - however deactivating static assertion support is not what we want in our environment

    • MichaelL's avatar
      MichaelL
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      17 days ago

      Sry. I was not precise in my post: I did a full compile (even removed generated files) including regenerating all IP files and not only the synthesis step. However, I will try turning off/on the checkbox.

  • sstrell's avatar
    sstrell
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    3 months ago

    It is possible your .stp file is corrupted.  I'd try recreating it.

  • sstrell's avatar
    sstrell
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    3 months ago

    You're not using the IP Catalog flow, so you don't have to worry about regenerating the IP.

    If you're just adding the .stp as a design file, then this could be an issue.  Use the setting in the Settings dialog box in the Signal Tap settings to enable/disable the .stp file.  The wrong assignment is probably being put in the .qsf if you're doing it manually.

    • MichaelL's avatar
      MichaelL
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      3 months ago

      I just removed and readded the stp file using the dialog:

      Still, I get the following error:

      So, is there any way to get this working, without creating a new stp-file?

      • RichardT_altera's avatar
        RichardT_altera
        Icon for Super Contributor rankSuper Contributor
        3 months ago

        Which Quartus Edition are you using—Standard or Pro?
        Does creating a new .stp file in your project (version 24.1) also cause this issue?

        Do you know when this .stp file was originally created and which Quartus version was used?
         

        Could you share your design .qar file (via Project > Archive Project) that can reproduce this error?
         

        Regards,
        Richard Tan 

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor
    3 months ago

    Are you using the IP Catalog flow for adding Signal Tap to your design instead of simply creating and adding the .stp file to your project?  If so, did you create Signal Tap in a previous version of Quartus?  Perhaps you need to regenerate the IP.

    Explain in more detail how you created Signal Tap and how you're using it.

    • MichaelL's avatar
      MichaelL
      Icon for New Contributor rankNew Contributor
      3 months ago

      Hi,

      for new signaltaps I'm clicking in quartus 24.1 on Tools => Signaltap Tap Logic Analyzer and then adding the nodes and instances.
      What now happend was that, I deactivated the signaltap in the .qsf-file, (did a synthesis), then readded it in the qsf (the stp-file hasn't been changed), reopend signaltap (using Tools => Signal Tap Logic Analyzer),  added some more nodes; did a new synthesis and the above assertion happened.

      How to I regenerate the IP, I thought this will happen automatically, as "set_global_assignment -name PROJECT_IP_REGENERATION_POLICY ALWAYS_REGENERATE_IP" is on.

      As for older signaltaps we simply add the stp-file (and activate it) in the qsf - Here, I can somehow understand that this might not be optimal, still the question is, what and how to update there, as "set_global_assignment -name PROJECT_IP_REGENERATION_POLICY ALWAYS_REGENERATE_IP" is on.
      Is there any way to manually update the signaltap?

      Michael