Altera_Forum
Honored Contributor
8 years agoQuartus Prime Standard Edition v17.0 Error: add_fileset_file: No such file
Hi,
I'm facing error in Qsys while generating NIOS system with "create simulation model" = either verilog or vhdl, no error if "create simulation model" = NONE. Does anyone know what is causing this error? Thanks. https://alteraforum.com/forum/attachment.php?attachmentid=14441&stc=1 https://alteraforum.com/forum/attachment.php?attachmentid=14442&stc=1 https://alteraforum.com/forum/attachment.php?attachmentid=14443&stc=1 Error: add_fileset_file: No such file /tmp/alt7491_7829365739350634514.dir/0006_cpu_gen/simgen_tmp_0 while executing "add_fileset_file "$file_name" OTHER PATH "$my_file"" (procedure "sub_add_generated_files" line 51) invoked from within "sub_add_generated_files "$NAME" "$output_directory" "$rtl_ext" "$simgen" "$plainTEXTfound"" (procedure "generate_with_plaintext" line 6) invoked from within "generate_with_plaintext "$NAME" "$rtl_ext" "$simgen"" (procedure "sub_sim_verilog" line 5) invoked from within "sub_sim_verilog nios_nios2_gen2_0_cpu" Error: Generation stopped, 33 or more modules remaining Error: qsys-generate failed with exit code 1: 2 Errors, 0 Warnings