Quartus Prime 24.1 Tool Crash

Hi,

Possible to provide the design file for duplicating?

Thanks,

Regards,

Sheng

Hi,

This project contains proprietary IP that cannot be shared. I did a quick check - if I exclude our IP the tool goes through synthesis and generates the netlist, but when I add our IP it crashes, it seems like some loop/some logic is causing the crash, and the same IP synthesizes with xilinx and our tools. Is this due to the license/memory? currently I am compiling with 30 days evaluation license and soon i will be switching to purchased license but not sure the issue is because of this. Also, is there an option in the tool to enable crash debug logs that I can generate during synthesis/elab? which i can share it with you for analysis.

Thanks,

Shivaji M

Hi,

Evaluation license probably cannot cover all features. Can you provide your ip may be encrypted one to me for testing on our machine?

Thanks,

Regards,

Sheng

Hi,

May I know do you have any further update or concern on previous post?

Thanks,

Regards,

Sheng

Hi Shivaji M,

Do they have any other options in the tool that I can dump and share you quickly? your request looks will take some time, and meanwhile I'm trying to narrow down what is causing the crash.

Seems like your ip causes the crash. Engineering team will need your custom ip to identify the fix else it'll be very hard to identify. Probably need to wait for your encrypted ip or after narrowing down.

I'm using an agilex7i AGIB027 device., Can you recommend any other stable Quartus tool version that I can give try, I’m using now 24.1?

If test with older version like 22.1, does the error still exist?

Thanks,

Regards,

Sheng

Hi,

May I know do you have any further update on the encrypted ip core?

Hi,

We made a workaround for this crash. For your info our IP have a modulo operator somewhere in deep of hierarchy, for some reason the tool cannot elaborate, it breaks with above pop-up, but when we compile it as a top-level module by making sure the same expression, tool elab + synthesizes and logic looks good. The same IP synthesizes normally with all other tools. Now we moved ahead with the workaround.

Thanks,

Shivaji M