Forum Discussion
binupr
Occasional Contributor
2 years agoQuartus optimising out big bunches of logic
Hi there,
In my project, I noticed Quartus is optimising a lot of sub-module components in synthesis. Interesting thing is when I run the sub-module synthesis, its components are in tact.
How can I make sure Quartus maintains hierarchical boundaries? I enabled 'Incremental compile' switch as an experiment. But did not do any improvement. I am using Quartus 23.2
Thanks
Binu
3 Replies
- sstrell
Super Contributor
Anything not connected eventually to an I/O can get optimized away. You can use virtual pin assignments to unconnected signals to avoid this.
- SyafieqS
Super Contributor
Let me know if there is any update from previous reply
- binupr
Occasional Contributor
You can close this ticket. Found a solution