Forum Discussion
binupr
Occasional Contributor
Occasional ContributorQuartus optimising out big bunches of logic
Hi there, In my project, I noticed Quartus is optimising a lot of sub-module components in synthesis. Interesting thing is when I run the sub-module synthesis, its components are in tact. How can I...
sstrell
Super Contributor
Super ContributorAnything not connected eventually to an I/O can get optimized away. You can use virtual pin assignments to unconnected signals to avoid this.
