Problem while simulating system design with DDR3 memory controller

Hi

I have recently started working with Nios11 based System design using Quartus for a project. I created the system in Platform Designer (qsys) and exported it to Nios SBT for writing simple code for simulations in modelsim. In simulations i could see that Nios11 processor seems to be uninitialized and doesn't work or excecute any actions in simulations. In setting I have added onchip SRAM as reset and exception vector. I would like to do to make simple read write data from external DDR3 memory(though booting happens from On Chip ram).