Honored ContributorHi all,
I want to implement a PLL that will lock onto & track an incoming signal of about 30KHz and output a multiple of that locked frequency. I tried using Quartus's PLL megacore function but it wont accept a 30KHz input signal, saying that its too low. Is there something I might be doing wrong or do I have to design my own PLL using the an XOR,NCO & the FIR filter megacores(if thats even possible)???
Honored ContributorHi again.
I took a bit of a break from my design,but Im back at it. I've figured out how to operate the NCO for my application (using it in "frequency modulation" mode). I can set the nominal frequency by giving it a certain integer constant(equations are given) and all it needs is an input from the loop filter. FvM, you mentioned some time ago that the NCO route is more labour intensive due to the NCO's digitized waveform output and that an "all digital PLL" solution would bee easier. Whats the difference between the two?Honored ContributorIf I understand right, you only need the phase accumulator from the NCO to build your PLL.
Honored ContributorBut the phase accumulator is given by the megafunction or can alternatively be calculated using the given equations in the user guide. This phase accumulator is then an input to the NCO in order to generate a sinusoid at my required frequency. This output sinusoid (well actually what I need is a clock, but I can hardlimit the sinusoid to get that) is what phase detector (XOR) needs, right?
Honored ContributorYou can use the phase accumulators most significant bit as digital clock :)
P.S.: Or more appropriate for a synchronous design, generate a clock enable on it's rising edge for one input clock cycle.Honored ContributorThe phase accumulator cannot be read, its an input (something I have to give the NCO in order for it to output the frequency I desire). I cant therefore read its MSB...or is tere something Im still not getting?
And thank you for your patience with me. Im really trying.Honored ContributorI'm not talking of a praticular NCO IP. A phase accumulator is simply a register.
if rising_edge(clk) then
phase <= phase + phase_increment;
end if;...but you mentioned earlier that I need the phase accumulator from my NCO to build my pll
("if i understand right, you only need the phase accumulator from the nco to build your pll."). As part of the pll, what would the input be for phase accumulator youre talking about? what I mean is that the NCO gets its input from the loop filter and adjusts its output simusoid accordingly & the that output goes back into the phase detector, who's output in turn goes into the loop filter ect.. So what Im asking is where in the pll does the phase accumulator you mention fit in?Honored ContributorYes, there's a misunderstanding.
--- Quote Start --- you only need the phase accumulator from the NCO --- Quote End --- I didn't mean, that you must necessarily use this phase accumulator (from the Altera NCO core). You can use any phase accumulator. I didn't think about the fact, that the Altera NCO doesn't have an output from the phase accumulator. If you're not familiar with NCO internals, you can see from the NCO MegaCore User Guide's functional description, that the phase accumulator isn't but a register and an adder. The more complex part of the NCO follows, but it's not needed for a pure digital PLL.Honored ContributorDoes a pure ditital pll still need a low pass filter? I cant seem to acquire lock with the pll I've constructed Im not sure why since all the connections make sense. the XOR output gives basically peaks or 1's when there is a difference between the incoming clock and the output of my hardlimiter (i havent implemented the phase accumulator suggestion yet). The thing with this is that even if the two XOR inputs have the same frequency, if theyre not in phase there will be a train of 1's at the XOR output, which (at the moment) I put through a low pass filter (BW = 34KHz) and the output of that I input into the frequency modulator input of the NCO.
Do I have the wrong configuration perhaps? Another thing I've tried is inputting the LPF output into the PHASE modulator input of the NCO, hoping for a phse shift to allign the two clocks so that the XOR output would eventually die out to zero. This also failed. Im not sure where to go from here.Honored Contributor