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Altera_Forum
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16 years ago

PLL megacore probs.build my own??

Hi all, I want to implement a PLL that will lock onto & track an incoming signal of about 30KHz and output a multiple of that locked frequency. I tried using Quartus's PLL megacore function but...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

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The thing with this is that even if the two XOR inputs have the same frequency, if theyre not in phase there will be a train of 1's at the XOR output.

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Yes, a PLL has the purpose to pull the (divided) VCO phase to the input phase. With an XOR gate, both inputs must have 50% duty cycle and it operates with 90° pahse shifz between both inputs. Other phase comparator typed are achieving 0° phase shift.