Platform Designer- SDRAM
Hello!
I tried the Quartus Platform Designerto create an SDRAM-Controller.
I noticed that you need to provide many information about the used chip, like timing constraints, but you don't need to provide the used clock frequency.
Does Quartus assume a certain frequency here, depending on the specified values, or does the Platform Builder recognize the clock that is attached to the generated block?
Thanks
Tim
Hi Tim,
For the SDRAM Controller Intel FPGA IP, the controller can support standard SDRAM as described in PC100 specification by JEDEC.
Basically the spec for clock frequency in running at 100MHz.
You may visit the link below for reference of SDRAM Controller Core.
https://www.intel.com/content/www/us/en/docs/programmable/683130/23-1/core-overview-29412.html
Regards,
Adzim