Forum Discussion
TimSch
New Contributor
New ContributorPlatform Designer- SDRAM
Hello! I tried the Quartus Platform Designerto create an SDRAM-Controller. I noticed that you need to provide many information about the used chip, like timing constraints, but you don't need to pr...
Hi Tim,
For the SDRAM Controller Intel FPGA IP, the controller can support standard SDRAM as described in PC100 specification by JEDEC.
Basically the spec for clock frequency in running at 100MHz.
You may visit the link below for reference of SDRAM Controller Core.
https://www.intel.com/content/www/us/en/docs/programmable/683130/23-1/core-overview-29412.html
Regards,
Adzim
sstrell
Super Contributor
Super ContributorOh, SDR not DDR. I guess the parameter is not needed because as long as the design meets timing with the clock you feed the controller, it won't be an issue. For DDR, the reference clock and the speed you plan on running the external memory are vital to the design, so they are included as parameters.
