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dmanikanth's avatar
dmanikanth
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3 years ago

Pipelining output data of RAM (M20K) through Quartus tcl console

Hi

I want to pipeline output data of M20K RAM block as few M20K --> M20K paths which are not meeting timing by around 2ns. I have tried ECC pipelining but getting error that the RAM should be of 512 depth and 32-bit width, this condition is not satisfied in the design i am working. Is there any parameter or assignment in quartus which i can pass in tcl console through which i can pipeline output data of all my RAM blocks (of any size)

5 Replies

  • RichardT_altera's avatar
    RichardT_altera
    Icon for Super Contributor rankSuper Contributor
    3 years ago

    Which device are you using? Are you using the RAM Intel IP?

    In the Intel IP, there is an option with "Which ports should be registered?" . Tick the " 'q' output port" option should add pipeline register at the output.

    Is this what you want to meet the design timing?


    p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 9/10 survey.


  • dmanikanth's avatar
    dmanikanth
    Icon for New Contributor rankNew Contributor
    3 years ago

    Hi

    I am using Agilex Agfa022 device and the RAM i am having is an auto generated altsynram inside sgbm block. Some I am unable to edit the RAM ip in the platform designer where i was able to go till 1 level into sgbm block.

    I have also run Fast Forward timing closure recommendation, where i have got fully registering the RAM's as one of the suggestions. Not sure how to apply the tool recommendations in the RTL as platform designer is not helping to navigate to RAM ip inside sgbm block.

  • RichardT_altera's avatar
    RichardT_altera
    Icon for Super Contributor rankSuper Contributor
    3 years ago

    Which RAM IP that you are using in your platform designer? Perhaps you can share a simple project .qar file so I can understand better.

    Some ways that I can think of is to add register at the RAM block output and change the project setting so that Quartus is allowed to RAM retiming. (change this in the Fitter Advanced setting)

    You may try to change the Optimization Mode to "High Performance Effort".


    Best Regards,

    Richard Tan


    p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 9/10 survey.


  • RichardT_altera's avatar
    RichardT_altera
    Icon for Super Contributor rankSuper Contributor
    3 years ago

    As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

    Thank you.

    Best Regards,

    Richard Tan

    p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 9/10 survey.