Honored ContributorHi,
I am a fresh person who have started verilog. I have written a verilog code for an encryption algorithm. Now I want to implement it in an FPGA board. I have a Altera DE1 board and currently using Quartus II 13.0 version. The algorithm outputs a 64-bit encrypted message. How can I see the output on my DE1 board? Should I use 7 segment displays? If so can anyone help me by giving any idea please.
Honored ContributorYou can use whatever output you wish. You'll need to get hold of or write a controller to drive them with your output data.
First though - have you simulated your design in a testbench in a simulator?Honored ContributorTricky, Thank very much for your response. Yes I have simulated the algorithm in modelsim. Can you please help me with any document which will help me to write a controller for 7 segment display. It would help me very much.
Honored ContributorThe User manual tells you the full pinout for the 7 seg displays and there are plenty of 7seg code examples on the web.
Honored ContributorCan you tell how it could be possible to see 64 bit message in four 7 segment display as each display has only 6 available pins to drive?
Honored ContributorI have no idea. It sounds like a mad idea.
Why not transfer the data to a PC via an RS232 link?Honored ContributorWhy not to use bouncing effect? shift info on LEDS to left than to right. left , right.
have any idea about LCD? but I agree that UART will be worthHonored ContributorAs I have an Altera DE1 board, it has no LCD display. Can I multiplex LEDs or a 7 segment to display my information?
Honored ContributorHonored ContributorI agree with Tricky. It will be more easy to read.
Perhaps you have no idea how to get it when computer recieve it. Why Microsoft removed hyperterminal program from modern windows ?))
