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Altera_Forum's avatar
Altera_Forum
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11 years ago

Observing output

Hi, I am a fresh person who have started verilog. I have written a verilog code for an encryption algorithm. Now I want to implement it in an FPGA board. I have a Altera DE1 board and currently us...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

I agree with Tricky. It will be more easy to read.

Perhaps you have no idea how to get it when computer recieve it. Why Microsoft removed hyperterminal program from modern windows ?))