FCiveOccasional Contributor7 years agoNo hardware detected in beta bus analyzer Dear community, I have a Terasic DE5-Net FPGA based on Stratix V FPGA. I would like to monitor the Avalon MM bus by mean of the Bus analyzer toolkit. I followed the guide of this link (https://fpgaw...Show More
YuanLi_S_IntelRegular Contributor7 years agoHi Federico, From the picture, it seems like the error is due to missing of .tcl file instead of JTAG. Can you please confirm? Regards, YL
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