FCiveOccasional Contributor7 years agoNo hardware detected in beta bus analyzer Dear community, I have a Terasic DE5-Net FPGA based on Stratix V FPGA. I would like to monitor the Avalon MM bus by mean of the Bus analyzer toolkit. I followed the guide of this link (https://fpgaw...Show More
YuanLi_S_IntelRegular Contributor7 years agoHi Federico, From the picture, it seems like the error is due to missing of .tcl file instead of JTAG. Can you please confirm? Regards, YL
Recent DiscussionsWhen you double click on a word, the other instances do not highlight due to the Find Box being openjtagserver.exe causing BSOD together with ftdi driverAutomatically added negative node for TDS output doesn't work with Agilex 5Agilex3 - unknown IDCODESignal Tap - *** Fatal Error: Segment Violation