Altera_Forum
Honored Contributor
15 years agoModelSim design effective reload?
Hi everyone,...
May I ask you a question,.. How to effectively reload design in ModelSim? I used Altera Quartus II v 9.1 and ModelSim 6.5b Altera Edition, I created a design in VHDL and I want to simulate it in ModelSim. So far I managed to create test bench for my design by exporting the Quartus Simulator *vwf file to *vht file, and then by clicking Tools -> Run Eda Simulation Tool -> EDA RTL Simulation, ModelSim load my design I it simulate my design... And my problem is when I changed the VHDL design in Quartus, how to effectively reload my design into ModelSim, so the ModelSim will simulate it like when I click "EDA RTL Simulation" menu. So far, I need to close and then reclick "EDA RTL Simulation" menu so the ModelSim resimulate my design... Does anyone know the answer? Any kind of help will be appreciated... Thanks...