Forum Discussion
Sangeetha2
New Contributor
New ContributorLogic generation failed to load result from design analysis and cannot get the list of IPs in design
Facing error while I try to compile example design generated for JESD204B in Quartus Prime pro 23.2. Logic generation failed to load results from design analysis and cannot get the list of IPs in th...
Which OS are you running?
Could you check whether it is supported on the webpage below?
Perhaps you can update your system so that it aligns with your colleague's system.
At this point, it is hard for us to debug what's wrong, as we are not able to duplicate the issue.
Best Regards,
Richard Tan
RichardT_altera
Super Contributor
Super ContributorDo you able to run the example design, attached in my previous response?
Best Regards,
Richard Tan
Sangeetha2New Contributor
New ContributorYes, the design what you have sent is running. Also, i tried generating the design in my colleague's system and copied the folder to mine. This design also compiling successfully.
But when I try to generate and compile the example design in my system, it is failing.. Don't know what is the issue from my side.
