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Sangeetha2's avatar
Sangeetha2
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2 years ago
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Logic generation failed to load result from design analysis and cannot get the list of IPs in design

Facing error while I try to compile example design generated for JESD204B in Quartus Prime pro 23.2. Logic generation failed to load results from design analysis and cannot get the list of IPs in th...
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RichardT_altera's avatar
RichardT_altera
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2 years ago

Do you able to run the example design, attached in my previous response?


Best Regards,

Richard Tan


  • Sangeetha2's avatar
    Sangeetha2
    Icon for New Contributor rankNew Contributor
    2 years ago

    Yes, the design what you have sent is running. Also, i tried generating the design in my colleague's system and copied the folder to mine. This design also compiling successfully.

    But when I try to generate and compile the example design in my system, it is failing.. Don't know what is the issue from my side.