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Altera_Forum's avatar
Altera_Forum
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18 years ago

Large Timing discrepancy between 6.0 and 7.1

Hi,

I find a big discrepancy in the maximum frequency when using the default settings for Quartus II 6.0 and 7.1 for one of my cores.

Using Quartus II 6.0 I get a maximum frequency of 162.05 MHz while in 7.1 I get 95.86 MHz.

Why is the difference so great?

By following recommendations from the Timing Advisor and also trying things that "make sense to me" I am at 107.82 MHz but it is still far from 162.05 MHz.

Has anybody seen such a large discrepancy in a design?

RAUL

PugMedia Inc.

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    Hi Raul

    I doubt this is a bug, or an issue with the timing engine.

    I would expect you are seeing different syhthasis / fit results due to changes in the default settings for 7.1.

    It may be worth checking the LE useage you are seeing post Synth, and post map in 7.1 when compared to 6.1.

    I would expect something that was being optimised in 6.X is geting missed in 7.1 or implemented in LE's.
  • Altera_Forum's avatar
    Altera_Forum
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    Hi,

    Nevermind, I actually was looking at the frequency of the wrong clock. There are three clocks in the design.

    The second best speed with 7.1 used the following resources:

    3491 LEs, 3072 bits of memory in 4 M4Ks running at 109.09 MHz

    Unoptimized 6.0 gives:

    3807 LEs, 2560 bits of memory in 3 M4Ks running at 91.27 MHz.

    Thanks,

    RAUL
  • Altera_Forum's avatar
    Altera_Forum
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    Hi Raul,

    You could have a compare between compile log, to see if there is any latch detected. I met the large timing discrepancy before, and I found the 7.1 detected much of the latch in the design while 6.0 not recognise it as latch. After I have fixed these latch, the timing change back common.So you could have a look of the warning message.