Increasing fmax performance.

Hello.

I have two subdesigns in my project working at 50MHz and 143MHz respectively. They both share sdram working at 143MHz so the design is something like subsys1->pipeline bridge->clock crossing bridge->sdram controller<-subsys2. Sub-system 2 is a video processing chain and sdram is used to store frame buffer. The problem is in that qsys inserts merlin burst adapter between framebuffer and sdram controller which seem to involve a long path of combinational logic (probably adder carry chains or that kind of stuff). I've reduced the burts length in framebuffer settings, but it still does not meet timing requirements. As i don't see the way to disable burst read in framebuffer, is there any solution except for reducing frequency?